时钟同步模式的英文

时钟 clock
同步 synchronization; synchronism ...
模式 model; mode; pattern; type; ...
时钟同步 clock synchronization
时钟同步器 clock synchronizer
快速时钟同步 fast clock synchronization
区域时钟同步 regional clock synchronization
信息段同步模式 frame synchronizing pattern; pattern, frame synchronizing
时钟同步脉冲重复频率 clock repetition rate
电钟同步机 electric clock synchronizer
电钟同步器 electric clock synchronizer
同步模块 synchronized module
电钟同步电动机 synchronous clock motor
世界原子钟同步 world wide synchronization of atomic clocks
下一事件同步模拟 next-event synchronous simulation
同步时钟 sync clock; synchroclock; synchronization clock; synchronize clock; synchronized clocke; synchronizing clocks; synchronous clock
下一个事件同步模拟 next event synchronous simulation
同步设备时钟 sec synchronous equipment clock
同步时钟操作 synchronous clock operation
同步时钟作业 synchronous clock operation
同步网络时钟 snc synchronous network clock
时钟保持模式 clock holdover mode
时钟(同步)脉冲发生器 cpg clock pulse generator
时钟脉冲，同步脉冲 cclock pulse
同步[时钟, 同标]脉冲发生器 clock pulse generator

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The serializer and deserializer moduls in the ftlvds chip are designed by the way of standard cell design approach . the paper emphatically discusses the tradeoff and the implementation of several clock synchronization modes and circuit structures , and makes a lot of verilog simulation and verification on the circuits designed
串并模块串行化器和解串行器采用标准单元的方法设计，论文讨论了对几种时钟同步模式以及串并转换电路结构的权衡和实现，并对所设计的电路结构进行了verilog模拟验证。