延迟单元的英文

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英文翻译
造句

delay cell
delay unit

延迟 delay; lag; defer; postpone; ...
单元 unit; unit element; cell; lo ...
传送延迟单位 transport delay unit
延迟单稳态多谐振荡器 delay monostable multivibrator
单元传送延迟 ctd cell transfer delay
单元延迟变化 cdv cell delay variation
延迟符合单元 delayed coincidence unit
单元丢失和延迟 cld cell loss and delay
信息单元延迟偏差 cdv cell delay variation
相邻信息单元延迟偏差 cell delay variation
信息单元延迟偏差容许量 cdvt cell delay variation tolerance
延迟 delay; lag; defer; postpone; put off; hold over; retard 将这件事延迟到下次会上讨论 hold the matter over till the next meeting; 展览会开幕的日期延迟了。 the opening of the exhibition has been postponed.; 延迟报警 delayed alarm; 延迟计数器 delay counter; 延迟继电器 delayed relay; 延迟装置 deferred mount; [电学] delayed action device; time-lag device;延迟自动增益控制[电学] delayed automatic gain control
信息单元延迟偏差，信元时延变化 cdv cell delay variation
单元 (自为一组的单位) unit; unit element; [计算机] cell; location; [电学] sub-unit; element 运算单元 arithmetic unit; 记忆单元 memory location; 教学单元 teaching unit; 十八号楼四单元二号 no.2, entrance 4, building 18
群延迟, 组延迟 group delay
包线；延迟 envelope delay
包延迟 packet delay
纯延迟 pure delay
粗延迟 coarse delay
耽误，延迟 delay
蝶延迟 adjusted delay
断延迟 off delay
光延迟 light delay
核延迟 nuclear delay
将……延迟 hold sth．over

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例句与用法

Several 3 - bit variable optical fiber delay units are designed and analysed on the basis of the conditions of our laboratory
依据实验室现有的一些条件,列出了几种能够实现的3 - bit可变光纤延迟单元的结构,并做了相应分析。
On one hand , the structure of delay unit is redesigned . in the case of the structure composed of three 2 2 optical switches , the relations between the status of optical switches and delay error are analysed by calculation and deduction , then a new delay unit composed of six 1 2 optical switches is designed and take place of the tranditional structure
一方面,改进可变光纤延迟单元的结构,以3个2 2光开关构成的延迟单元为例,对其开关状态与延时误差之间的关系进行了理论分析和公式推导,并根据这一结果设计了由6个1 2光开关构成的具有较低延时误差的3 - bit可变光纤延迟单元。
The main contribution of the thesis is seen as follows : aiming at the fault with slow speed and high power dissipation of the conventional phase - frequency detector , a high speed and low power dissipation phase - frequency detector is designed by modifying the structure of the single phase lock dynamic d flip - flop and adding the delay cell in the feedback loop to eliminate the phase detector ’ s dead zone effectively
论文的主要贡献为以下几个方面: 1 .针对传统鉴频鉴相器速度慢、功耗高的缺点,改进了单相时钟动态d触发器的结构,设计出了一种高速低功耗的鉴频鉴相器,在反馈回路上加入延迟单元,能有效的消除鉴相死区。