phase locked中文是什么意思

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中文翻译
造句

锁相
相位同步的

phase n. 1.形势，局面，状态；阶级。 2.方面，侧面。 3 ...
lock lock2 n. 1.一绺卷发。〔pl.〕 ...
automatic phase-locked loop 自动锁相回路
digital phase locked loop 数字锁相环
digital phase-locked loop 数字锁相环路
impulse phase-locked loop 脉冲锁相环
locked ferrite phase shift 锁式铁氧体移相器
loop, phase-locked (pll) 锁相环路
paramertric phase-locked oscillator 见parametron
parametric phase-locked oscillator 参数器
phase locked detection 锁相检波; 相位同步检波
phase locked detection，pld 锁相检测
phase locked detector 锁相检波器; 同相检波器
phase locked filter 锁相滤波器
phase locked frequency discriminator 锁相鉴频器
phase locked local oscillator 锁相本机振荡器
phase locked logic 锁相逻辑
phase locked loomotor control 锁相回路电动机控制
phase locked loop 锁相环锁相环路; 锁相回路
phase locked loop，pll 锁相回路，相锁定回路，锁相环路
phase locked oscillator 柏锁振荡器
phase locked oscillator，plo 锁相振荡器
phase locked servo system 锁相伺服系统
phase locked source 锁相源
phase-locked amplifier 锁相放大器

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例句与用法

Phase lock and multiple frequency circuit diminishes the influence from frequency fluctuation of electric net ; in addition , multiple channels simultaneous sampling , high - precision circuit decreases the error caused from the sampling tache
用锁相倍频跟踪电路来提供采样频率，以减少频率波动的影响，用多路同采的高精度采样电路来减少采样环节引入的误差。
The phase noise in microwave receiver and the measured parameter of source frequency instability are described in this paper , and the technology of frequency - synthesizing and theory of phase locked loop ( pll ) are also briefly introduced
摘要阐述了微波接收机中的相位噪声概念及本振源频率不稳定度的实际测量参数，并简要介绍了频率合成技术和锁相环路工作原理。
In this paper , we are going to use high speed digital signal processor , track the carrier wave through the digital phase locked loop , and so to demodulate the modulating signal . it can overcome the difficult problems of the other ways
而我们这里就是准备用高速数字信号处理器，利用数字锁相环实现对载波的跟踪，从而实现调制信号的解调，它能有效克服其他解调方式所遇到的困难。
A novel lock mechanism , which is a combination of predicate lock and two - phase locking of data records , is also designed in the context of egist . the degree 3 consistency or repeatable read isolation of transactions can be guaranteed
并针对egist结构的特点，采用扩展的右链技术以及谓词锁与两阶段数据锁联合使用的封锁策略，实现对egist索引树的高效并发操作，并可满足事务的可重复性读一致性要求。
In the aspect of excute model , this paper analyzed usual concurrency control protocol : two - phase locking , multiversion concurrency control and multiversion two - phase locking protocol , optimized conventional mv2pl protocol , and provided a transaciton model of active database
在执行模型中，本文在对传统执行模型的研究的基础上分析了常见的并发控制协议：两段锁协议、多版本协议和多版本两段锁协议。
Utilizing phase locked loop technique with complex programmable logic devices ( cpld ) , a method to perform high - speed data acquisition , storage and transmission for transformer testing , which solves the problem of data acquisition for high frequency band , is proposed
摘要提出了利用锁相环技术结合复杂可编程逻辑器件( cpld )实现对变压器测试信号的高速采集、存储、传输的方法，很好地解决了对变压器高频特性信号的采集。
In allusion to the working characteristics and technical difficulties of 155mb / s burst mode receiver , we have put forward to the quick synchronization of inpouring phase locked loops ( pll ) . for receiving burst signal , we introduce the scheme of dc coupling and dynamic threshold decision
针对155mb s突发式收发模块的工作特点和技术难点，我们提出了注入锁相环法的快速同步技术；对于突发式信号的接收，我们采用了直流耦合和动态阈值判决的技术方案。
According to the proposal , two millimeter - wave phase locked sources are locked on a crystal oscillator . the one of the phase locked source is used for steady carrier wave in transmitter , the other is used for local oscillator . through the proposal , coherent transceiver front - end is achieved
本方案采用同一晶振源为收发两个毫米波锁相源作参考频率,其中的一个锁相源用于产生高稳定的发射载波频率,另一个用于产生高稳定的本振信号,从而实现收发的相参性。