rtl中文是什么意思

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中文翻译
造句

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从右向左
从右至左
电阻晶体管逻辑电路
寄存器传送语言
寄存器转移水平
卢森堡广播电视台
文本文件格式
运行时库

rtl gate 电阻晶体管逻辑门
rtl plus 卢森堡广播电视台
rtl television rtl电视台
rtl语言 register transfer language
level, register-transfer (rtl) 寄存器转移水平
logic, resistor-transistor (rtl) 电阻晶体管逻辑
radio transmission technology (rtl) 无线电播送技术
register transfer level rtl 暂存器转化层
register-transfer level (rtl) 寄存器转移水平
resistor-transistor logic (rtl) 电阻晶体管逻辑电路
rtl resistor transistor logic 电阻晶体管逻辑（电路）
rtl real time language 实时语言
rtl real time link 实时链路
rtl register transfer level 寄存器传送级别
rtl register transmit language 寄存器传送语言
rtl run time library 运行时间库
rtl(register transfer level 暂存器转换层
rtl电视台 rtl television
rtk realtime kinematic 实时动态
rtk 实时动态; 运输总周转量; 总周转量
rtjrj 起误
rti响应时间指数 rti response time index
rtiv 图形处理软件

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例句与用法

And the process of functional verification consists of the implementation of rtl ( register transfer level ) simulation , gate level simulation and post - layout simulation in the process of design
验证最关键的是测试方案的制定，而功能验证的过程是在于在设计过程中实施rtl级仿真、门级仿真和后仿真。
Compared to rtl code , using behavioral code can reduce code and verification effort , improve simulation performance , and it is prone to realize parallel constructs on serial processor
和trl代码相比，行为描述代码可以减少代码量和测试的工作量，提高仿真的性能，并更有利于在串行处理器上实现并行结构。
We also designed rtl and spice models of the fsram , which show that the fsram significantly improves memory access time , while reducing power consumption , with negligible area overhead
我们已经设计了fsram的rtl和spice模型，这证明了fsram在降低功耗的同时大大改善了存储器的存储时间，而面积开销可以忽略不计。
Hahn , who lives on 200 euros a week and has his rent paid by his mother , said he wanted to use some of the rest of the cash to finance his studies and buy a rail pass , rtl said
目前，哈恩每周的生活费为200欧元，房租一直靠母亲资助。他表示，在父母办完婚事后，他将用剩下的钱去读书并为自己买一张德国的火车通票。
In another way , we develop a compiler in virtue of gcc ' s intermediate language , rtl ( register transfer language ) , but we must rewrite the program of code generation and code optimization
此外，我们借助gcc编译过程中产生的中间代码rtl ( registertransferlanguage )文件，重写目标代码生成和优化功能程序，为新的目标机器开发c语言编译器。
Finally this architecture is described at the register transfer level ( rtl ) using the vhdl language . the results of simulation are identical with those of matlab simulation and thus the validity of this architecture is proved
最后用vhdl语言对各个模块进行了寄存器传输级描述,仿真结果和用matlab计算得到的结果相同,验证了设计结构的正确性。
The design phase includes the standardization of rtl coding , logic synthesis and place & route ; the verification phase includes the function verification , static timing analysis and physical verification for 08c01
设计工作包括对08c01软核的rtl级代码标准化、逻辑综合和布局布线；验证工作包括对08c01软核的功能验证、静态时序分析和物理验证。
Then , the rtl design of the module about contol transfer is emphasized . it mainly includes the out logic function , the in logic function , the special logic function and the configuration logic function
然后从模块的算法级设计的角度，着重讨论了控制传输模块端点0的设计，主要包括输出逻辑功能块、输入逻辑功能块、特殊逻辑功能块和配置逻辑功能块。
By the top - down way , the design was divided into several modules according to their functions , which were characterized respectively . meanwhile , behavior description , rtl function simulation and logic synthesis were carried out
在充分了解驱动电路系统的基础上,采用“自上向下”的设计方法将其划分为几个功能模块,并对它们分别进行了行为描述、 rtl功能仿真、逻辑综合。