digital logic中文是什么意思

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中文翻译
造句

数位逻辑
数字逻辑

digital adj. 1.手指的；指状的。 2.数字的，数据的。 n ...
logic n. 1.逻辑，理论学。 2.推理[方法]；逻辑性，条理 ...
course design of digital logic 数位逻辑课程设计; 数字逻辑课程设计
digital integrated logic (dil) 数位积体逻辑
digital logic circuit 数字逻辑电路
digital logic function 数字逻辑函数
digital logic gate 数字逻辑门
digital logic module 数字逻辑组件:可以完成多种基本逻辑运算功能的电路
digital logic simulator 数字式逻辑模拟器
digital logic type 数字逻辑电路类型
digital pneumatic logic 数字气动逻辑
dlc digital logic circuit 数字逻辑电路
dls digital logic simulator 数字逻辑模拟器
dls digital logic system 数字逻辑系统
experiment on digital logic circuits 数字逻辑电路实验
optoelectronic digital logic 光电数字逻辑系统
programmable digital logic 可编程数字逻辑; 可编程序数字逻辑
programmed digital logic 程序数字逻辑
testing digital logic circuit 数字逻辑测试电路
testing digital logic circuits 测试数字逻辑电路
dccl digital charge coupled logic 数字式电荷偶合逻辑电路
dctl digital coupled transistor logic 数字耦合晶体管逻辑（电路）
-logic -logic, -logical 〔构成与 -logy 结尾的名词相应的形容词〕表示“…学的”： biological, philological.
and logic “与”逻辑
logic n. 1.逻辑，理论学。 2.推理[方法]；逻辑性，条理性。 3. 威力，压力，强制(力)。 deductive [inductive] logic演绎[归纳]逻辑。 dialectical logic辩证逻辑。 formal logic形式逻辑。 a gangster logic强盗逻辑，恶徒的歪理[言行]。 mathematical logic数理逻辑。 pure logic纯粹逻辑。 He is not governed by logic. 他没有逻辑性。 That is not logic. 那不合逻辑。 the irresistible logic of facts 事实的不可抗拒的威力。 the logic of events [war] 事件[战争]的强制力。 His logic is shaky. 他的推理站不住脚。 chop logic 诡辩。

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例句与用法

To realize nolinear excitation controller , it must be improved that the disposal speed of nolinear excitation control " s signal . with analyzing and comparing all kinds of microcomputer excitation controller , a new microcomputer excitation control scheme is offered that is based on dsp controller while the cpld chip is utilized for realizing the function of pulse trigger . it is described in detail that the method of realizing controllable silicon digital logic by verilog hardware describe language and the designed digital pulse trigger " s veracity was validated by digital simulation
论文进一步针对非线性励磁控制要求信号处理速度高、信息量大的特点，在对目前微机励磁控制器分析基础上，提出采用dsp控制器芯片作为核心处理器的微机励磁控制器的解决方案，运用复杂可编程逻辑器件cpld芯片实现可控硅同步脉冲触发单元，并简要说明了verilog硬件描述语言和数字脉冲形成逻辑的方法，通过电路数字仿真对所设计的数字触发单元进行了验证。
Higher mathematics , visual basic programming design , fundamentals of law , linear algebra ， fundamentals of , computer application , physical education , computer networks and communication , c + + with object - oriented , programming , data structures , philosophy and political theory , programming in c language , operating systems , software test technology , relations on business , digital logic circuit , international software development , social analysis and government policy , introduction to java visual foxpro database systems and program design , e - business , introduction to programming with an application framework , software engineering , introduction to web page design and programming
高等数学、大学计算机应用基础、程序设计教程软件工程、用户界面设计、电子商务、软件工程、数据库应用与程序设计、线性代数、编码理论基础、信息管理基础、软件成本估算、质量管理、计算机软件技术基础、实用软件体系基础、大型软件体系结构、软件测试技术、客户关系管理、电子商务、国际化软件开发、现代项目管理、计算机网络与通信。
Taking the advantage of the characteristic of nonlinear multi - zone partition in multi - dimension of mtn , an approach of employing mtn for archiving arbitrary digital logic was proposed . according to this approach , the xor operation which needs three stns to achieve was implemented using single mtn
然后对多阈值神经元及其输出特性作了详细分析，利用多阈值神经元具有在多维空间中多区域非线性划分的特点，提出了用一个多阈值神经元实现任意数字逻辑的规范方法。
The signal generator is based on dds ( direct digital synthesize ) , the maximal frequency of signal is 5mhz , the minimal frequency is 100hz , its minimal resolution is 4 . 77hz ; in the module of data acquisition , we adopt a adc which the range of sample frequency is 100khz to 40mhz , and its resolution is 12 bits ; the most digital logic is accomplished in cpld ( complex programmable logic device ) ; the control and calculating is realized in computer , and the external hardware is communicated with computer by epp of it ; the software is programmed on the developing plat of labwindows / cvi
信号源采用直接数字合成原理实现，它所能产生的信号频率为100hz 5mhz ，最小频率分辨率为4 . 77hz ；数据采集采用了12位的adc ，最高的采样频率为40mhz ，最低的采样频率为： 100khz ；主要的数字逻辑部分采用cpld实现；控制以及计算功能在计算机内完成，硬件电路板通过计算机的epp口实现与计算机的数据传递；软件是在labwindows / cvi环境中编写的。
By thorough analysis and synthetize this paper made a frame of the system of intelligent instrument and its hardware structure . as followed , this paper depicted design details of intelligent instrument " s hardware , it included the design of interface circuit , data commutations and digital logic of dsp , mcu , internet ' s chip and isp ' s apparatus etc . , and have designed schematic map and circuit . so it accomplished the full design of hardware / software of the new type intelligent instrument
本文具体给出了新型智能仪器硬件结构及实现，描述了智能仪器硬件设计细节，包括数字信号处理器、单片机、 internet接入芯片、可编程数字/模拟器件等在新型智能仪器中的接口电路设计、数据通信设计和数字逻辑设计等，详细地给出了设计原理图和电路图；给出了新型智能仪器的软件设计细节，从而完成了新型智能仪器完整的软硬件设计。
Server power is specially designed for computer systems which has a large market , so it has become a focus in the field of power electronics . for computer system , the evolution of digital logic technology continues to impose increasing supply current needs while demands its power has high efficiency and high power density at the same
服务器电源的供电对象是计算机系统，随着信息产业的快速发展和数字化革命的不断深入，服务器电源的输出电流越来越大，同时对其效率和功率密度的要求也越来越高，因此其设计变得越来越困难。
Proceeding from the mission of reducing neuron numbers in neural networks ( nns ) and enhancing the information processing abilities of single neuron , as well focusing on the digital logic implementation by multi - thresholded neurons ( mtns ) , this dissertation makes it possible that digital logic can be implemented by a small number of neurons and the nns realized digital logic may have high information density
论文从减少神经网络中神经元个数及提高单个神经元信息处理能力两个角度出发，以数字逻辑的多阈值神经网络实现作为研究内容，提出用较少的神经元实现数字逻辑，并且使实现的数字逻辑具有较高信息密度的可能性。
148hz , its minimal resolution is 0 . 148hz . most digital logic is accomplished in cpld ( complex programmable logic device ) ; the control and calculating is finished in computer , and the external hardware is communicated with computer by epp of it ; the software is programmed in the developing plat of labwindows / cvi
本信号源所能产生的信号频率为0 . 02hz ? 5mhz ，最小频率分辨率为0 . 02hz ，主要的数字逻辑部分采用cpld实现，控制以及计算功能在计算机内完成，硬件电路板通过计算机的epp口实现与计算机的数据传递；软件是在labwindows cvi环境中编写的。
This article mainly discusses the enforcement rule and requirement of intelligent teaching system mode based on digital logic course ; discusses how to provide best tactics of teaching means and method by using digital logic course ' s intelligent teaching system ; and how to make use of intelligent teaching system ' s intelligent tools based on digital logic course , to teach digital logic course , so as to further improve teaching quality and teaching level
文章主要探究了基于数字逻辑课程的智能教学系统模型的实施、规则和要求；探究了如何利用数字逻辑课程的智能教学系统提供最佳的教学手段和教学方法的策略，以及如何利用基于数字逻辑课程的智能教学系统的智能工具，对数字逻辑课程进行教学，以达到进一步提高教学质量和教学水平的目的。
Begin with analysis of binary logic implementation by single - thresholded neuron ( stn ) , we drew a conclusion that digital logic implementation by neuron is actually a classification problem in multi - dimension space . meanwhile , we pointed out the demerits of soluting such problem by stn . then , the mtn and its transfer function was discussed particularly
首先从二值数字逻辑的单阈值神经元实现的分析入手，通过对一个例子的分析，得出用神经元实现数字逻辑实为一个在多维空间中分类问题的结论，同时指出单阈值神经元在解决这一问题时存在的缺陷。