Microwave assembly detail specification for model wfz1006 phased locked dielectric resonator oscillator 微波组件. wfz1006型锁相介质振荡器详细规范
Hybrid integrated circuits . detail specification for type hsxb01 phase locked loop with frequncy doubler 混合集成电路. hsxb01型锁相倍频电路详细规范
Based on the theory of dpll , line phase locked and color subcarrier regeneration were designed 依据数字锁相环的基本原理,完成了行锁相、色副载波还原电路的设计。
For keeping the frequency and phase synchronous to the grid , a pll ( phase locked loop ) is necessary 为了使并网电流和电网电压同频、同相,需要使用锁相环技术。
Digital phase lock loop is used in this section to synchronize to an incoming serial data stream 数据接收解码模块中使用了数字锁相环技术从输入数据码流中提取出同步时钟信号。
There is a pll ( phase locked loops ) in system to get a high - stability low - noise high - frequency signal 固定频率振荡器通常采用锁相环技术来获得高稳定度、低相位噪声的高频输出信号。
The essential theory of analog phase lock loop ( apll ) and digital phase lock loop ( dpll ) are introduced 然后介绍了模拟锁相环和数字锁相环技术,并对数字锁相环的稳定性和稳态误差性能进行了分析。
A new harmonic current detecting method is brought forward , namely ip - iq harmonic current detecting method without phase lock loop ( pll ) 提出了一种新的谐波电流检测方法,即无锁相环ip - iq谐波电流检测法。
Then presented the basic structure , phase model , frequency response and performance analysis for noise and spur , of phase locked loop ( pll ) 然后介绍了锁相环( pll )的基本结构、相位模型、频率响应、噪声及杂散性能。