In this article , a method that designs the high rate multiplexer with fpga technology and vhdl language is described . the multiple digital signals will be multiplexed in one data channel by the multiplexer , while the data is packaged in ccsds standard format . the algorithm that make data channel alternate regularly is also elaborated in the paper 本文阐述了利用先入先出存储器fifo进行异步速率调整,应用vhdl语言和可编程门阵列fpga技术,对多个信号源数据进行数据打包、信道选通调度和多路复接的方法。