×

data channel造句

"data channel"是什么意思   

例句与造句

  1. We designs a communication protocol on this model , implementing many functions between host computer and radio , such as data transmission , radio management and control , status advertisement , etc . this paper uses the interface protocol , designs a radio link layer protocol , and implements the driver for the radio in linux operating system . after testing and measurement , we conclude that this interface protocol can be a model which uses ethernet interface as a transparent data channel
    本文使用了此接口协议,设计了无线链路协议,并且在linux操作系统中以电台驱动程序的方式实现了接口和链路协议,通过对驱动程序运行情况的测试,说明该接口协议对网络层协议而言屏蔽了以太网作为透明通道的事实,此协议接口模型的可以实现和完成既定的功能和目标。
  2. The original design program of counting data acquisition system continue to use the train of thought within dos operating system , but the multitask operating system windows are absolutely distinguished form dos . because the way of system data transmittance are program inquiring , at the same time the acquisition and transmittance process cannot be interrupted . this data transmittance mode within windows will be disturbed by other program ' s interruption and lost the requested data . so we have improved the original design of cd400bx ict data acquisition system . we shift the data transmittance mode from program inquiring to hard interruption , and install fifo cache in front of data channel , in order to guarantee the stability , reliability of data acquisiton and transmittance
    由于计数式数据采集系统的原设计方案沿用了以前dos操作系统下的设计思路,而windows操作系统作为多任务操作系统其运行机制和dos有根本的区别。由于系统采用的数据传送方式为程序查询方式,而数据采集和传送的过程都不能被中断。在windows操作系统下这种数据传送方式会因为其他程序的中断造成数据丢失。
  3. Hsupa ( high speed uplink packet access ) is the new technique of r6 , first in this thesis , the hsupa physical layer is introduced in detail . then base on the physical layer technique characteristic , according to the 3gpp simulation requirements and system simulation requirements , the hsupa downlink and uplink can be constructed by using matlab . then the data channel and control channel can be simulated , so the channels performance can be realized , provide the results can be provided to the system simulation , these ground the future practical applications
    Hsupa ( highspeeduplinkpacketaccess ) ? ?高速上行分组接入就是r6版本中的新技术,本文首先详细介绍了hsupa物理层的技术特征,然后以其技术特点为依据,按照3gpp的仿真需求和系统级的仿真需求,使用matlab构建hsupa的上下行物理层链路,对其数据信道和控制信道进行仿真验证,从而了解信道的性能,为系统仿真提供仿真数据,为以后的实际应用打下基础,达到预研的目的。
  4. A testbench program is edited to simulate the behavior of the fifo . after the software simulation is accomplished , a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard . during the experiment and hardware debugging , the output logic of the fpga is checked up
    设计中,用vhdl语言对高速复接器进行行为级建模,为了验证这个模型,首先使用软件进行仿真,通过编写testbench程序模拟fifo的动作特点,对程序输入信号进行仿真,在软件逻辑仿真取得预期结果后,继续设计硬件电路,设计出的实际电路实现了将来自两个不同速率的信源数据( 1394总线数据和1553b总线数据)复接成一路符合ccsds协议的位流业务数据。
  5. Common data interfaces used in radio include rs - 232 , etc . as the rapid growth of data speed in data radio , asynchronous serial port does not meet the need of data transmission of high - speed data radio . data radio is gradually using ethernet interface as high - speed data radio ’ s data interface , to function as a high - speed data channel between host computer and data radio . this paper brings forward a universal radio interface protocol model , whose core is taking ethernet as a high speed data channel in network protocol stack
    本文针对电台的以太网接口,经过对各种电台的功能分析,提出了一种通用的在以太网通信中适用的报文接口协议模型,其核心思想是将以太网作为网络协议栈中内部的高速数据传输通道来使用,作为链路层和物理层之间的内部接口,同时提供电台控制和数据传输两大功能模块。
  6. It's difficult to find data channel in a sentence. 用data channel造句挺难的
  7. Further investigated and analyzed composition structure and flow data that dsa ' s formation of image is systematic at first in this paper , carried on intact summing up to the data in the system , having given out the plan of design of high speed and large capacity data channel of digital formation of image system of x - ray ; deeper discussion of control way on sdram , give solution that many pieces of sdram works togetherses of realizing heavy capacity , designing of heavy capacity deposit board realize storing at a high speed to vision data by frame on the basis of this ; through further investigations of interface of pci bus , optimize back end state machine design and urge procedure making with lower , giving intact pci interface scheme that realize high speed dma data transmission and satisfy request of video transmitting ; further investigate the figure systematic design method of programmable logic devices , due to the difficult point of drifting about of enabled signal in fifo in common use and setting up and keeping of output signal , method has been proposed of improving stability of system making use of signal utilizing the phase locking ring in fpga to offer a lot of clocks to move thus realize coordinating the data between every module of system to transmit at a high speed by making use of fifo
    本文首先对数字减影血管造影( dsa )成像系统的组成结构和数据流向进行了深入研究和分析,并对系统中的数据流向进行了完整的归纳和总结,给出了x线数字成像系统中的高速大容量数据通道的设计方案;在对sdram的控制方式做了深入探讨后,给出了实现大容量多条sdram共同工作的解决方案,在此基础上设计了大容量帧存板实现对图象数据进行高速存储;通过对pci总线接口的深入研究,优化后端状态机设计和低层驱动程序开发,给出了完整的pci接口方案实现高速dma数据传输,完全可以满足视频传输要求;深入研究了基于大规模可编程器件的数字系统设计方法,针对通用fifo使能信号漂移、输出数据难于建立和保持等设计难点,提出了利用fpga中的锁相环提供多个时钟相移的信号来提高系统稳定性的解决方案,从而实现利用fifo来协调系统各模块之间的数据高速传输。
  8. In this article , a method that designs the high rate multiplexer with fpga technology and vhdl language is described . the multiple digital signals will be multiplexed in one data channel by the multiplexer , while the data is packaged in ccsds standard format . the algorithm that make data channel alternate regularly is also elaborated in the paper
    本文阐述了利用先入先出存储器fifo进行异步速率调整,应用vhdl语言和可编程门阵列fpga技术,对多个信号源数据进行数据打包、信道选通调度和多路复接的方法。
  9. 更多例句:  上一页  

相邻词汇

  1. "data certification"造句
  2. "data chain"造句
  3. "data chaining"造句
  4. "data chamber"造句
  5. "data change"造句
  6. "data channels"造句
  7. "data character"造句
  8. "data chart"造句
  9. "data check"造句
  10. "data checking"造句
桌面版繁體版English日本語

Copyright © 2025 WordTech Co.

Last modified time:Mon, 11 Aug 2025 00:29:56 GMT