system clocks造句
例句与造句
- 2 . using the method of dds + pll to generate the system clock and count clock which are synchronous . 3
2.通过dds+pll的方法实现脉冲/数据发生器所需的系统时钟以及计数时钟的产生,以及其同步的实现。 - based on the system clock and trigger input signals, using fpga to generate trigger output signals in given working modes
3.通过fpga实现在一定系统时钟和触发信号作用下各种工作模式的触发信号的产生。 - a typical cluster replication is around eight seconds, and then we allow a minute more than that in case system clocks wander a bit
典型的集群复制大概需要8秒钟左右，而我们允许1分钟的时间，以免系统时钟偏移。 - to ensure accuracy, the timer should check the system clock as needed, rather than try to keep track of accumulated time internally
若要确保精确，计时器应根据需要检查系统时钟，而不是尝试在内部跟踪所积累的时间。 - system clock provides several synchronism clocks for every sub-circuit . reset circuit assumes that digital circuits have an initial state and self start
系统时钟电路分出多个同步频率,以提供不同数字子电路的同步时钟。 - It's difficult to find system clocks in a sentence. 用system clocks造句挺难的
- provides properties for accessing the current local time and universal coordinated time equivalent to greenwich mean time from the system clock
提供了用于从系统时钟中访问当前本地时间和协调通用时间等同于格林威治时间的属性。 - if you have set your system clock to the correct time then the instruments will be shown in the correct relationship to the stars on the celestial sphere
如果你的系统时间设置正确，屏保中所显示的将与当前天空中的实际星体位置相符。 - which provides properties for accessing the current local time and universal coordinated time equivalent to greenwich mean time from the system clock
，它提供用于访问系统时钟中的当前本地时间和协调通用时间（即格林威治标准时间）的属性。 - if the system clock on the user's computer is ahead of the system clock on the server that contains her user profile, the server profile may not load
如果用户电脑上的系统时钟快于含有她的用户配置文件的服务器的系统时钟，服务器的配置文件不被调用。 - if the system clock on the user's computer is ahead of the system clock on the server that contains her user profile, the server profile may not load
如果用户电脑上的系统时钟快于含有她的用户配置文件的服务器的系统时钟，服务器的配置文件不被调用。 - in digital circuits, an outer rc circuit, combined with inter ring oscillator obtain series of oscillation pulses for system clock and delay clock
在芯片的数字电路中,设计了外部rc环节配合片内环振构成的振荡电路,提供系统时钟、延迟时钟的振荡脉冲。 - object provides properties for accessing the current local time and universal coordinated time equivalent to greenwich mean time from the system clock
my.computer.clock对象提供了一些属性，可用于从系统时钟访问本地当前时间及协调通用时间（相当于格林威治标准时间）。 - pll referred in this thesis is aimed to generate system clock . the concept of phase locking was invented in the 1930s and swiftly found wide usage in electronics and communication
自从上世纪30年代锁相理论被提出后，锁相环在电子、通讯等领域得到了迅速而广泛的应用。 - the encoder and decoders in the paper has been tested on the circuit board using the altera ’ s fpga of stratix gx ep1sgx25df672c7 with the system clock of 125mhz
本文的编解码器采用altera公司的fpga芯片stratixgxep1sgx25df672c7在系统时钟125mhz的情况下完成了电路板测试。 - gets an object that provides properties for accessing the current local time and universal coordinated time the equivalent to greenwich mean time from the system clock
获取一个对象，该对象可提供用于从系统时钟访问当前的本地时间和协调通用时间（与格林尼治标准时间相同）的属性。