- 测试生成
- test: n. 【动物；动物学】(软体类的)介壳，甲壳；【植物；植 ...
- generation: n. 1.代〔约30年〕，世代，时代；同时代的人。 2. ...
- automatic test generation: 自动测试产生; 自动测试生成
- automatic test generation (atg): 自动测试产生
- automatic test pattern generation: atpg; 自动测试模式产生; 自动产生测试图案
下载手机词典可随时随地查词查翻译
test generation中文什么意思
- 测试生成
下载手机词典可随时随地查词查翻译
例句与用法
- 更多例句： 上一页 下一页
- For example , a test file is named by concatenating the word " test " with the name of the file that contains the code you are testing ; for example , " class1test . cs . " names of test classes and test methods are generated using defaults also ; you can change these defaults in the test generation configuration dialog box , which you can open by clicking
测试类和测试方法的名称也使用默认值生成，可以在“测试生成配置”对话框中更改这些默认值，若要打开此对话框，请单击“单元测试生成”对话框上的“配置” 。 - A algorithm is presented to identify dynamic crosstalk noise . in the course of dynamic crosstalk noise identification , hybrid timing analysis is used to provide accurate signal arrival time , which can provide more accurate timing information than static timing analysis . at the same time , a novel test generation is chosen to verify the correlation of signals . so dynamic crosstalk noise can be identified by these accurate timing and logic information
提出了动态串扰噪声的识别算法.针对基于传统静态时序分析的结果过于保守的缺点,本算法引入了混合时序分析,缩小了时间窗区间,为动态串扰噪声的识别提供了准确的时序信息,与此同时,通过测试生成来验证信号间的逻辑关系,根据这些准确的时序及逻辑信息,识别出动态串扰噪声 - In addition , an experimental system using c language is established , including modules such as representation of waveform polynomial , decision of path senstization , delay computing , clocking based on single - period sensitization , clocking based on multi - period sensitization , test generation considering noise and transformation from bit - level waveform polynomial to word - level polynomial model . they respectively used to test models and techniques proposed in this paper
另外， :基于c语言本人设计开发了一个实验软件系统，该系统包括波形多j一贞式表示模块、敏化通路判定模块、延时计算模块、单周期敏化的最小时钟周期精确确定模块、多周期敏化的最小时钟周期确定方法模块、考虑噪声的测试生成模块和位级波形多项式描述转化成字级多项式描述模块，分别用于对本文各章中提出的自动化设计的模型和方法进行实验验证。 - Since high performance control logics are usually hard for non - scan test generation , dft structures could be embedded as offsets in tradition , while it will cause manufacturing cost increase and performance overhead . in this paper , an indirect test generation method based on retiming is proposed , which could dramatically reduce the cost of non - scan atpg without any loss of original optimized attributes . experiments on some iscas 89 benchmarks show the benefits of our approach in enhancing atpg of performance - driven logic
对性能驱动控制逻辑进行测试生成难度较大，通常要加入可测性结构，但会影响原电路优化性能并增加生产成本.本文以重定时理论为基础，提出了对高性能时序电路进行间接测试生成的方法，这种方法在不影响原电路任何优化特性的前提下，可显著降低测试生成时间，提高测试生成质量.在iscas ’ 89部分基准电路进行实验，结果证明了其有效性