This paper not only introduces the hardware and softeware design of the lowest voltage measuring device , but also explains the main circuit structure and speciality 介绍了电机最低起动电压测试仪的硬件及软件设计,并对主要电路的结构及其特点进行了阐述。
The main research area is the structure optimization of floating - point adder , which is intent to minimize the delay of floating - point addition and optimize the circuit structure 主要研究方向是优化浮点加法器结构,减小浮点加法运算的延迟,优化电路结构。
The experimental results also testify that the algorithm can decrease test generation complexity and simplify the circuit structure and function information 实验结果证明分层测试产生算法能提高测试产生效率、降低测试产生复杂度,并且简化电路结构和功能信息。
Using the filter forming electric circuit and the active integral forming electric circuit structure , and the irregular pulse become the standard the accurate gauss pulse 该放大器采用微分成形电路和有源积分成形电路结构,使不规则脉冲变换成标准的准高斯脉冲。
In addition , both the series - parallel connection and parallel pipeline for the circuit structure are availed to cut down hardware area and improve processing speed of the system 同时,为保证系统的实时处理速度和降低硬件成本,在算法的vlsi实现时采用串并结合和并行流水线等设计。